1. Field of the Invention
The present invention relates to methods for making liquid crystal display devices. In particular, the present invention relates to a method for making a liquid crystal display device using a substrate having a reverse staggered thin film transistor array. The method enables a reduction in the number of photomasks used in the process.
2. Description of the Related Art
FIG. 9 is a schematic diagram of a substrate with a thin film transistor array of a conventional thin film transistor liquid crystal display device. Each segment of the thin film transistor array includes a reverse staggered thin film transistor, a gate line G, and a source line S. A matrix of the gate lines G and the source lines S is arranged on a transparent substrate composed of, for example, glass. Each region surrounded by the gate lines G and the source lines S forms a pixel 1. Each pixel 1 has two thin film transistors 2.
FIGS. 7A to 7E are cross-sectional views showing the production steps of a thin film transistor array substrate, and FIGS. 8A to 8E are plan views showing the steps. With reference to FIGS. 7E and 8E, a gate electrode 4 extracted from a gate line G is formed on a transparent substrate 3. A gate insulating film 5 is formed to cover the gate electrode 4. A semiconductive active film 6 composed of amorphous silicon (a-Si) is formed on the gate insulating film 5 at a position above the gate electrode 4. A source electrode 8 and a drain electrode 9 are formed over the semiconductive active film 6 and the gate insulating film 5 and are extracted to the source line S. An ohmic contact layer 7 intervenes between the source electrode 8 and the semiconductive active film 6 and between the drain electrode 9 and the semiconductive active film 6. These components constitute a thin film transistor 2. A passivating film 10 is formed to cover the thin film transistor 2. A contact hole 11 is formed in the passivating film 10 lying on the drain electrode 9. A pixel electrode 12 composed of a transparent conductive film such as indium tin oxide (hereinafter referred to as ITO) is formed over the contact hole 11 and is electrically connected to the drain electrode 9.
With reference to the left sides in FIGS. 7E and 8E, a gate terminal pad section 13 is arranged on a terminal of the gate line G at the exterior of the display region. In the gate terminal pad section 13, a lower pad layer 14 corresponding to the terminal of the gate line G is formed on the transparent substrate 3, and the gate insulating film 5 and the passivating film 10 are formed on the lower pad layer 14. A contact hole 15 is formed so as to pass through the gate insulating film 5 and the passivating film 10. An upper pad layer 16 is formed over the contact hole 15, in which the upper pad layer 16 is composed of the same transparent conductive film as the pixel electrode 12 and is electrically connected to the lower pad layer 14.
Referring now to production of the thin film transistor array substrate, a conductive film is deposited on a transparent substrate 3, as shown in FIGS. 7A and 8A, and patterned to form a gate electrode 4 and a gate line G. A lower pad layer 14 is formed at a gate terminal pad section 13. With reference to FIGS. 7B and 8B, a gate insulating film 5 is formed to cover the gate electrode 4 and the gate insulating film 5. An a-Si film 18 and then an a-Si:n.sup.+ film 19 are deposited thereon and patterned using a photomask to form an island 17 on the gate insulating film 5 above the gate electrode 4. With reference to FIGS. 7C and 8C, a conductive film is formed on the entire surface of the substrate and patterned to form a drain electrode 9, a source electrode 8, and a source line S. The a-Si:n.sup.+ film 19 on the channel section of the a-Si film 18 is removed to form an ohmic contact layer 7 composed of the a-Si:n.sup.+ film 19.
With reference to FIGS. 7D and 8D, a passivating film 10 is deposited on the entire surface of the substrate and patterned to form a contact hole 11 on the drain electrode 9 and a contact hole 15 on the lower pad layer 14. The contact hole 11 electrically connects the drain electrode 9 and a pixel electrode 12, and the contact hole 15 electrically connects the lower pad layer 14 and an upper pad layer 16. With reference to FIGS. 7E and 8E, an ITO film is deposited on the entire surface of the substrate and patterned to form the pixel electrode 12 and the upper pad layer 16. A conventional thin film transistor array substrate is thereby produced.
The above-mentioned conventional process requires five patterning steps for forming the gate, for forming the island, for forming the source/drain, for forming the contact holes, and for forming the pixel electrode, and thus requires five photomasks (hereinafter the process is referred to as a five-mask process). A reduction in the number of patterning or lithographic steps and thus in the number of photomasks in the production line is eagerly awaited in view of reduction in material and production costs and production period, since the photomasks are expensive and the photolithographic steps require a long process time.
The line material for the gate and source lines must have low electrical resistance and thus a low-resistant metal, such as aluminum or molybdenum is demanded. Aluminum and molybdenum are, however, not resistive against etching of the ITO film (hereinafter referred to as ITO etching). When aluminum or molybdenum is used for the gate and source lines in the above-mentioned conventional process, the exposed positions of the gate and source lines are also etched during etching of the ITO film in the patterning step for the pixel electrode. Thus, the use of aluminum or molybdenum requires a protective film for preventing the metal film from being etched. Accordingly, the use of such a metal requires an additional patterning step using another photomask, in other words, a six-mask process, running counter to the demands of a more simplified process. Compatibility between low resistance of the line material and a reduction in production costs or shortened process time has not been solved by conventional processes.